FOWLP/PLP - semiconductor - BUSINESS - NEPES

Fan Out-WLP/PLP

입출력(I/O) 단자를 칩 바깥으로 재배열하여
칩을 보다 작게, 고성능으로 구현할 수 있는 미세 패키징 솔루션입니다.

FOWLP/nPLP™ Solutions

To provide multiple package solutions, high reliability and functionality in a smaller footprint for expanding the portfolios

Fan-Out packaging is the platform with expanded connections out of the chip area, enabling more external I/Os.

FOWLP & M-series™ based (300mmRd) and PLP (600mmSq) with test & Back-end turnkey service

nPoP™ Solutions

nPoP™(nepes Package of Package), both in Chip-first & Chip-last platform, is a Fan-out based stacking package

It combines a FO bottom on which a memory is mounted, and includes Cu posts for through-mold vertical interconnections.

Product View

VALUE	FOWLP RCP™	FOWLP/PLP M-Series™		PoP
VALUE	300mm Round	300mm Round	600mm Panel	Chip-First	Chip-Last
Product View
Advantages	FOWLP is conventional fan- out WLP with molding & wafer level RDL technology Smaller form-factor, Thinner profile and substrate-less package Higher electrical performance with lower transmission loss of shorter electrical path	With M-Series and Adaptive Patterning®,the barriers to chips-first, high-density fan-out disappear Die shift and warpage control through Adaptive patterning 6 sides protection for Higher board level reliability with M-Series PLP (600mm Panel) is a technology that can utilize the area more efficiently than the 300mm Round Panel. Fit 5x more 300mm wafers in one panel through 600mm panel size		Very thin package profile even package stacking platform of Process & Memory packages. The smallest Form factor (smaller size & thinner profile) Highly integration with multi-layer RDLs and finer line & space pitch of 5um. Stackable package through Cu Post vertical interconnection technology Higher Electrical & Thermal Performance compared to conventional PoP packages with very shortest electrical path and higher ration of silicon chip inside bottom package.
Features	High Reliability Meets JEDEC MSL3 CLR and BLR requirements Slim & Small formfactor Integration & Size with SiP	High Reliability Meets JEDEC MSL3 CLR and BLR requirements Slim & Small formfactor Flexible productivity Cost effectiveness
Application	Communication, Consumer, Automotive, Industrial, Computer, (RF, PMIC, AP, Connectivity, Baseband, Audio codec, sensor, (x)PU)